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| United States Patent | 7,930,337 |
| Hasenplaugh , et al. | April 19, 2011 |
Techniques are described to multiply two numbers, A and B. In general, multiplication is performed by using Karatsuba multiplication on the segments of A and B and adjusting the Karatsuba multiplication based on the values of the most significant bits of A and B.
| Inventors: | Hasenplaugh; William C. (Jamaica Plain, MA), Gaubatz; Gunnar (Worcester, MA), Gopal; Vinodh (Westboro, MA), Bace; Matthew M. (North Andover, MA) |
|---|---|
| Assignee: |
Intel Corporation
(Santa Clara,
CA)
|
| Family ID: | 38846423 |
| Appl. No.: | 11/476,329 |
| Filed: | June 27, 2006 |
| Document Identifier | Publication Date | |
|---|---|---|
| US 20070299899 A1 | Dec 27, 2007 | |
| Current U.S. Class: | 708/625 |
| Current CPC Class: | G06F 7/5324 (20130101) |
| Current International Class: | G06F 7/52 (20060101) |
| Field of Search: | ;708/620,625,491-492 |
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| 2003/0206628 | November 2003 | Gura et al. |
| 2003/0206629 | November 2003 | Eberle et al. |
| 2007/0083585 | April 2007 | St Denis et al. |
| 2008002822 | Jan 2008 | WO | |||
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